We present in this paper a fully integrated low-noise high common-mode rejection ratio\n(CMRR) logarithmic programmable gain amplifier (LPGA) and chopped LPGA circuits for EEG\nacquisition systems. The proposed LPGA is based on a rail-to-rail true logarithmic amplifier (TLA)\nstage. The high CMRR achieved in this work is a result of cascading three amplification stages\nto construct the LPGA in addition to the lower common-mode gain of the proposed logarithmic\namplification topology. In addition, the 1/f noise and the inherent DC offset voltage of the input\ntransistors are reduced using a chopper stabilization technique. The CMOS 180 nm standard\ntechnology is used to implement the circuits. Experimental results for the integrated LPGA show a\nCMRR of 140 dB, a differential gain of 37 dB, an input-referred noise of 0.754 microVrms, a 189 microW power\nconsumption from 1.8 V power supply and occupies an active area of 0.4 mm2.
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